Chinese translation for "logic family"

逻辑系列

Related Translations:

active logic:  有源逻辑

contention logic:  争用逻辑

core logic:  磁心逻辑

hardware logic:  硬件逻辑

logic trainer:  逻辑教练设备逻辑示教机

overflow logic:  溢出逻辑溢位逻辑

logic base:  逻辑代数基础逻辑基逻辑数据库

logic polarity:  逻辑极化

logic restraint:  逻辑限制

set logic:  置位逻辑

Example Sentences:

	1.	Each logic family has a "unit load expressed in milliamperes. " 各类逻辑电路都有一个用毫安表示的“单位负载。”
	2.	Each logic family has a " unit load expressed in milliamperes . 各类逻辑电路都有一个用毫安表示的“单位负载。 ”
	3.	From the comparison , we know that mcml is most suitable for working under low voltage supply among the logic families 通过对比发现， mcml电路比其它逻辑电路更适合在低电源电压下工作。
	4.	Since different logic families work at different voltage levels it is somewhat complicated to interface components from different families together 因为不同的逻辑器件都具有不同的识别范围，所以将不同的器件组合起来使用是很复杂的。
	5.	Coverage ranges from thermal properties and semiconductor materials to mosfets , digital logic families , memory devices , microprocessors , digital - to - analog and analog - to - digital converters , digital filters , and multichip module technology 覆盖范围从热性能和半导体材料的mosfet ，数字逻辑家庭，记忆体装置，微处理器，数位类比和模拟到数字转换器，数字滤波器，以及多芯片组件技术。
	6.	Rsfq ( rapid - single - flux - quantum ) logic family is a new type of technology in superconducting digital circuits , in which the information is carried in the presence or absence of sfq voltage pulses generated by damped josephson junctions 超导快单磁通量子rsfq ( rapidsinglefluxquantum )电路是一种新型超导数字电子技术，它通过磁通量子化了的电压脉冲的有、无，来表示二进制信息。
	7.	Mesfet digital logic families : performance criteria for logic . logic families : normally - on logic ( fl , bfl , sdfl ) ; normally - off logic ( dcfl ) ; comparison offamilies ; examples of fabrication sequences ; performance data ; state - of - the - art commercially 10金属-半导体接面场效电晶体数位逻辑家族：逻辑效能标准。逻辑家族：常开逻辑( fl ， bfl ， sdfl ) ，常关逻辑( dcfl ) ，家族比较，制程步骤?例，效能数据，已商业化之科技产品。
	8.	Circuit design is the basis of design of demultiplexer . speed , power and chip area are the main factors that should be considered in circuit design . every circuit structure has its merits and drawbacks , e . g . cmos logic family has a slower speed , but lower power , smaller area , scfl ( source couple fet logic ) family has a higher speed , but higher power , larger area . we should choose a proper circuit structure or their mixed structure for certain design to get a good tradeoff among the three factors . flip - flop is the fundamental element of demultiplexer , setup time and hold up time are key factors , which influence the speed of circuit , thus the design aim is how to reduce them . in this thesis we place emphasis on the design of scfl latches 速度、功耗、面积是电路设计要考虑的主要因素，不同的电路形式具有不同的优缺点，如cmos互补逻辑电路功耗低，面积小，速度相对较慢； scfl (源极耦合fet逻辑)电路速度高，功耗和面积较大。所以要针对具体设计需要选用适当的电路形式或其组合结构，以满足设计要求。触发器是分接器的基本组成单元，建立时间和保持时间是影响电路速度的关键，所以减小建立时间和保持时间是触发器设计的主要目标，本文着重介绍了scfl锁存器的设计和优化方法。
	9.	As the technology entered the era of deep - submicron ( dsm ) technologies , the second order effects of cmos device are having more and more influence on the performance of the cmos logic circuits . this dissertation compared the performance of four popular logic families against mcml under dsm technology 随着工艺发展进入深亚微米时代， cmos器件的二阶效应对电路的性能产生着越来越重要的影响，论文首先对比讨论了mcml电路和其它各种常用逻辑电路在采用深亚微米器件时的性能表现。

Similar Words：

"logic equation generator" Chinese translation, "logic equation simulation" Chinese translation, "logic equivalent" Chinese translation, "logic error" Chinese translation, "logic expression" Chinese translation, "logic fault" Chinese translation, "logic fault condition" Chinese translation, "logic file" Chinese translation, "logic file storage" Chinese translation, "logic file system" Chinese translation